Electrical characterization of SOI pMOS device leakage-Reference-Cited by-同舟云学术

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Electrical characterization of SOI pMOS device leakage

Published:2023-10 Issue: Volume:208 Page:108740
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Bosch D.,Lheritier P.^ORCID,Guyader F.,Joblot S.,Ponthenier F.,Lacord J.

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference10 articles.

1. Weber O, et al. 18nm FDSOI Enhanced Device Platform for ULP/ULL MCUs. In: 2022 International Electron Devices Meeting (IEDM), déc. 2022, p. 27.2.1-27.2.4. doi: 10.1109/IEDM45625.2022.10019397.

2. Guyader F, et al. 3-Tier BSI CIS with 3D Sequential & Hybrid Bonding Enabling a1.4um pitch,106dB HDR Flicker Free Pixel. In: 2022 International Electron Devices Meeting (IEDM), déc. 2022, p. 37.4.1-37.4.4. doi: 10.1109/IEDM45625.2022.10019432.

3. Subbreakdown drain leakage current in MOSFET;Chen;IEEE Electr Dev Lett,1987

4. Rigorous theory and simplified model of the band-to-band tunneling in silicon;Schenk;Solid State Electr,1993

5. A new model for the description of gate voltage and temperature dependence of gate induced drain leakage (GIDL) in the low electric field region [DRAMs];Rosar;IEEE Trans Electr Dev,2000

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. SOI pMOS drain leakage understanding based on TCAD and measurements;2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD);2023-09-27

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