3-Tier BSI CIS with 3D Sequential & Hybrid Bonding Enabling a1.4um pitch,106dB HDR Flicker Free Pixel

Author:

Guyader F.1,Batude P.2,Malinge P.1,Vire E.1,Lacord J.2,Jourdon J.1,Poulet J.1,Gay L.1,Ponthenier F.2,Joblot S.1,Farcy A.1,Brunet L.2,Albouy A.2,Theodorou C.3,Ribotta M.2,Bosch D.2,Ollier E.2,Muller D.1,Neyens M.1,Jeanjean D.1,Ferrotti T.1,Mortini E.1,Mattei J.G.1,Inard A.1,Fillon R.1,Lalanne F.1,Roy F.1,Josse E.1

Affiliation:

1. STMicroelectronics

2. CEA-Leti, Univ. Grenoble Alpes

3. Univ. Grenoble Alpes, Univ. Savoie Mont Blanc,CNRS, Grenoble INP, IMEP-LAHC

Publisher

IEEE

Reference17 articles.

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Comprehensive evaluation of gate-induced drain leakage in SOI stacked nanowire nMOSFETs operating in high-temperatures;Solid-State Electronics;2024-04

2. Ultimate Layer Stacking Technology for High Density Sequential 3D Integration;2023 International Electron Devices Meeting (IEDM);2023-12-09

3. Extracting edge conduction around threshold in mesa-isolated SOI MOSFETs;Solid-State Electronics;2023-11

4. Electrical characterization of SOI pMOS device leakage;Solid-State Electronics;2023-10

5. Doped Channel SOI pMOS TCAD Description Including Floating Body Effects;2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD);2023-09-27

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