A robust 12T SRAM cell with improved write margin for ultra-low power applications in 40 nm CMOS-Reference-Cited by-同舟云学术

A robust 12T SRAM cell with improved write margin for ultra-low power applications in 40 nm CMOS

Published:2017-03 Issue: Volume:57 Page:1-10
ISSN:0167-9260
Container-title:Integration
language:en
Short-container-title:Integration

Author:

Kim Jaeyoung,Mazumder Pinaki

Funder

National Science Foundation

Samsung Scholarship

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference36 articles.

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