Design of an area and energy-efficient last-level cache memory using STT-MRAM

Author:

Saha RajeshORCID,Pundir Yogendra Pratap,Pal Pankaj Kumar

Publisher

Elsevier BV

Subject

Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference31 articles.

1. Memory leads the way to better computing;Wong;Nat. Nanotechnol.,2015

2. “Introduction to Nanoelectronics” in Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications;Dasgupta,2017

3. Reducing switching latency and energy in STT-MRAM caches with field-assisted writing;Patel;IEEE Trans. Very Large Scale Integr. VLSI Syst.,2016

4. Jim Handy Cache Memory Book (2nd ed.). 1998 Morgan Kaufmann 10.5555/275790.

5. International technology roadmap for semiconductors. (2015). Retrieved from http://www.itrs2.net/itrs-reports.html. Accessed August, 2020.

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