A new design approach to improve DC, analog/RF and linearity metrics of Vertical TFET for RFIC design
Author:
Publisher
Elsevier BV
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,General Materials Science
Reference31 articles.
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3. Tunnel field effect transistors as energy efficient electronic switches;Ionescu;Nature,2011
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5. Dual-metal-gate InAs tunnel FET with enhanced turn-on steepness and high ON-current;Beneventi;IEEE Trans. Electron. Dev.,2014
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1. Design and Investigation of Junctionless N+ Pocket Doped Vertical-TFET with Binary Metal Alloy $P_{\alpha}Q_{1-\alpha}$;2024 IEEE 3rd International Conference on Electrical Power and Energy Systems (ICEPES);2024-06-21
2. Study of parametric variations on Heterojunction Dual Gate Vertical TFET for performance Enhancement;2023 IEEE Silchar Subsection Conference (SILCON);2023-11-03
3. Design and optimization of vertical nanowire tunnel FET with electrostatic doping;Engineering Research Express;2023-10-19
4. Performance Analysis of Hetero-Dielectric Buried Oxide Double Gate Vertical TFET;Proceedings of 7th ASRES International Conference on Intelligent Technologies;2023
5. Vertically-Grown TFETs: An Extensive Analysis;Silicon;2022-11-22
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