CNTFET-based digital arithmetic circuit designs in ternary logic with improved performance

Author:

Gireesh NamineniORCID,Basha Shaik JavidORCID,Elbarbary Ahmed

Publisher

Elsevier BV

Reference41 articles.

1. Highly-efficient CNTFET-based unbalanced ternary logic gates;Abbasian;ECS J. Solid State Sci. Technol.,2023

2. A new BGP-based load distribution approach in geographically distributed data centers;Esmaeili;Nashriyyah-i Muhandisi-i Barq va Muhandisi-i Kampyutar-i Iran,2018

3. Implementation and analysis of a novel low power and portable energy measurement tool for wireless sensor nodes;Zandi,2018

4. A half adder design based on ternary multiplexers in carbon nano-tube field effect transistor (CNFET) technology;Nikbakht;ECS J. Solid State Sci. Technol.,2020

5. A high-speed low-energy one-trit ternary multiplier circuit design in CNTFET technology;Abbasian;ECS J. Solid State Sci. Technol.,2023

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