Fabrication and selective wet etching of Si0.2Ge0.8/Ge multilayer for Si0.2Ge0.8 channel gate-all-around MOSFETs-Reference-Cited by-同舟云学术

Fabrication and selective wet etching of Si0.2Ge0.8/Ge multilayer for Si0.2Ge0.8 channel gate-all-around MOSFETs

Published:2021-01 Issue: Volume:121 Page:105397
ISSN:1369-8001
Container-title:Materials Science in Semiconductor Processing
language:en
Short-container-title:Materials Science in Semiconductor Processing

Author:

Liu Haoyan,Li Yongliang^ORCID,Cheng Xiaohong,Zan Ying,Lu Yihong,Wang Guilei,Li Junjie,Kong Zhenzhen,Ma Xueli,Wang Xiaolei,Yang Hong,Luo Jun,Wang Wenwu

Funder

Beijing Municipal Natural Science Foundation

Science and Technology Program of Beijing Municipal Science and Technology Commission

CAS Pioneer Hundred Talents Program

National Key Project of Science and Technology of China

Publisher

Elsevier BV

Subject

Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science

Reference11 articles.

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2. High crystal quality strained Si0.5Ge0.5 layer with a thickness of up to 50 nm grown on the three-layer SiGe strain relaxed buffer;Zhao;Mater. Sci. Semicond. Process.,2019

3. Toward High Performance SiGe Channel CMOS: Design of High Electron Mobility in SiGe nFinFETs Outperforming Si;Lee,2018

4. First demonstration of vertically stacked gate-all-around highly strained germanium nanowire pFETs;Capogreco;IEEE Trans. Electron Devices,2018

5. Stacked Nanosheet Gate-All-Around Transistor to Enable Scaling beyond FinFET;Loubet,2017

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1. Extremely High-κ Hf_0.2Zr_0.8O₂ Gate Stacks Integrated Into Eight Stacked Ge_0.95Si_0.05 Nanowires and Nanosheets nFETs to Boost I_ON;IEEE Transactions on Electron Devices;2023-12

2. Extremely High-κ Hf_0.2Zr_0.8O₂ Gate Stacks Integrated into Ge_0.95Si_0.05 Nanowire and Nanosheet nFETs Featuring Respective Record Ion per Footprint of 9200μA/μm and Record Ion per Stack of 360μA at V_OV=V_DS=0.5V;2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits);2023-06-11

3. A stacked high-Ge-concentration SiGe/Ge multilayer on a novel Ge + SiGe SRB structure for the gate-all-around MOSFETS;Journal of Materials Science: Materials in Electronics;2022-09-15

4. 4-Levels Vertically Stacked SiGe Channel Nanowires Gate-All-Around Transistor with Novel Channel Releasing and Source and Drain Silicide Process;Nanomaterials;2022-03-07

5. Improving Driving Current with High-Efficiency Landing Pads Technique for Reduced Parasitic Resistance in Gate-All-Around Si Nanosheet Devices;ECS Journal of Solid State Science and Technology;2022-03-01