Equivalent model and limit for the SOI lateral power device using high-k dielectric
Author:
Funder
National Natural Science Foundation of China
Publisher
Elsevier BV
Subject
General Physics and Astronomy
Reference17 articles.
1. A novel SOI LDMOS with substrate field plate and variable-k dielectric buried layer;Li;Results Phys,2018
2. A novel lateral DMOS transistor with H-shape shallow-trench-isolation structure;Liu;IEEE Trans Electron Dev,2018
3. A high-voltage “Quasi-p-LDMOS” using electrons as carriers in drift region applied for SPIC;Yi;IEEE Trans Power Electron,2018
4. A new analytical model for optimizing SOI LDMOS with step doped drift region;Guo;Microelectron J,2006
5. Analytical model and optimization for variable drift region width SOI LDMOS device;Wang;IEEE Trans Electron Dev,2016
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1. Double dielectrics enhancement on the LDMOS using high-k field dielectric and low-k buried dielectric;Results in Physics;2022-07
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