Shrinking from 0.25 down to 0.12 μm SOI CMOS technology node: a contribution to low-frequency noise in partially depleted N-MOSFETs-Reference-Cited by-同舟云学术

Shrinking from 0.25 down to 0.12 μm SOI CMOS technology node: a contribution to low-frequency noise in partially depleted N-MOSFETs

Published:2003-07 Issue:7 Volume:47 Page:1213-1218
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Dieudonné F,Haendler S,Jomaah J,Balestra F

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference12 articles.

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4. Phase noise characteristics associated with low-frequency noise in submicron SOI MOSFETs feedback oscillator for RF ICs;Tseng;IEEE Trans. Electron Dev.,1999

5. Haendler S et al. Comparative low-frequency noise analysis in various SOI devices: floating body, body-tied, DTMOS with and without current limiter. In: Proc 2000 Int SOI Conf pp.126–27

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