Author:
Lee Jang-Soo,Hong Won-Kee,Kim Shin-Dug
Subject
Hardware and Architecture,Software
Reference22 articles.
1. A. Sausbury, F. Pong, A. Nowatzyk, Missing the memory wall: the case for processor/memory integration, in: Proceedings of the 23rd International Symposium on Computer Architecture, June 1996, pp. 90–101
2. D. Burger, J.R. Goodman, A. Kagi, Memory bandwidth limitations of future microprocessors, in: Proceedings of the 23rd Annual International Symposium on Computer Architecture, May 1996, pp. 79–90
3. J. Hennesey, D. Patterson, Computer architecture: a quantitative approach, second ed., Morgan Kanfman, San Francisco, 1996, pp. 6–7
4. A universal algorithm for sequential data compression;Ziv;IEEE Trans. Inform. Theory,1997
5. E.A. Kusse, A.J. Isles, On the fly cache compression and decompression, http://infopad.eecs.berkeley.edu/ ekusse/, CS 252 Project, UC Berkeley, 1996
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