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Stability Enhancing SRAM cell for low power LUT Design

  • Published:2020-02 Issue: Volume:96 Page:104704
  • ISSN:0026-2692
  • Container-title:Microelectronics Journal
  • language:en
  • Short-container-title:Microelectronics Journal

Author:

Swamynathan S.M.,Bhanumathi V.

Publisher

Elsevier BV

Subject

General Engineering

Reference24 articles.

1. Embedded Intel Solutions [Online] http://www.embeddedintel.com/news.php?article=2 76.

2. Wiring requirement and three-dimensional integration technology for field programmable gate arrays;Rahman;IEEE Trans. Very Large Scale Integr. Syst.,2003

3. “Architecture Evaluation for Power-Efficient FPGAs,” International Symposium on Field Programmable Gate Arrays;Lee,2003

4. AES on FPGA from the Fastest to the Smallest;Good,2005

5. “Soft Multipliers for DSP Applications,” Altera.

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1. CNTFET-based Data Independent Power Efficient and Robust 8T SRAM Cell;ECS Journal of Solid State Science and Technology;2023-06-01

2. Efficient Power Reduction of Volatile Memory Circuits Using Gated Ground and Supply Gated Techniques;2022 3rd International Conference on Communication, Computing and Industry 4.0 (C2I4);2022-12-15

3. Comparison of the Power Output of SRAM and SESRAM with and without use of Recovery Boosting Method;2022 International Conference on Augmented Intelligence and Sustainable Systems (ICAISS);2022-11-24

4. Improved read/write assist mechanism for 10‐transistor static random access memory cell;International Journal of Circuit Theory and Applications;2022-06-17

5. Ultra-low-power and stable 10-nm FinFET 10T sub-threshold SRAM;Microelectronics Journal;2022-05
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