Comparison of the Power Output of SRAM and SESRAM with and without use of Recovery Boosting Method
Author:
Affiliation:
1. Sri Eshwar College of Engineering,Department of ECE,Coimbatore,Tamil Nadu
2. Dr.MahalingamCollege of Engineering and Technology,Department of ECE,Pollachi,Tamil Nadu
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10010702/10010572/10010856.pdf?arnumber=10010856
Reference27 articles.
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5. A new 7T SRAM cell in sub‐threshold region with a high performance and small area with bit interleaving capability
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