Electrical modeling of tapered TSV including MOS-Field effect and substrate parasitics: Analysis and application

Author:

Nabil Amira,Bernardo Jose A.,Ma Yue,Abouelatta Mohamed,Shaker Ahmed,Bouchet Latifa Fakri,Ragai Hani,Gontrand Christian

Publisher

Elsevier BV

Subject

General Engineering

Reference37 articles.

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2. Modelling of through silicon via RF performance and impact on signal transmission in 3D integrated circuits;Cadix;IEEE International Conference on 3D System Integration,2009

3. Development and characterization of a through-multilayer TSV integrated SRAM module;Zhu,2013

4. A 1.2 V 12.8 GB/s 2 Gb mobile wide-I/O DRAM with 4 128 I/Os using TSV based stacking;Kim;IEEE J. Solid State Circ.,2012

5. Modeling and analysis of coupling between TSVs, metal, and RDL interconnects in TSV-based 3D IC with silicon interposer;Yoon,2009

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