An area-efficient static CMOS carry-select adder based on a compact carry look-ahead unit-Reference-Cited by-同舟云学术

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An area-efficient static CMOS carry-select adder based on a compact carry look-ahead unit

Published:2004-12 Issue:12 Volume:35 Page:939-944
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Ruiz G.A.,Granda M.

Publisher

Elsevier BV

Subject

General Engineering

Reference19 articles.

1. Computer Arithmetic: Principles, Architecture, and Design;Hwang,1979

2. Computer Arithmetic, Algorithms and Hardware;Parhami,2000

3. Digital Arithmetic;Ercegovac,2004

4. Principles of CMOS VLSI Design: a Systems Perpective;Weste,1992

5. A spanning tree carry lookahead adder;Lynch;IEEE Transactions on Computers,1992

Cited by 20 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Carry look-ahead and ripple carry method based 4-bit carry generator circuit for implementing wide-word length adder;Microelectronics Journal;2023-10

2. Wide word‐length carry‐select adder design using ripple carry and carry look‐ahead method based hybrid 4‐bit carry generator;Engineering Reports;2023-06-29

3. Design of FIR Filter Using Low-Power and High-Speed Carry Select Adder for Low-Power DSP Applications;IETE Journal of Research;2023-04-25

4. Analysis of 6T Full Adder using 2T XOR and 2T XNOR Module;2023 IEEE 12th International Conference on Communication Systems and Network Technologies (CSNT);2023-04-08

5. Design of High Speed BCD Adder Using CMOS Technology;IEEE Access;2023

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