Design of FIR Filter Using Low-Power and High-Speed Carry Select Adder for Low-Power DSP Applications-Reference-Cited by-同舟云学术

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Design of FIR Filter Using Low-Power and High-Speed Carry Select Adder for Low-Power DSP Applications

Published:2023-04-25 Issue: Volume: Page:1-14
ISSN:0377-2063
Container-title:IETE Journal of Research
language:en
Short-container-title:IETE Journal of Research

Author:

Swetha Siliveri¹²^ORCID,Siva Sankara Reddy N.³^ORCID

Affiliation:

1. ECE Department, CVR College of Engineering, Hyderabad, India

2. ECE Department, University College of Engineering, Osmaina University, Hyderabad, India

3. ECE Department, Vasavi College of Engineering, Hyderabad, India

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering,Computer Science Applications,Theoretical Computer Science

Link

https://www.tandfonline.com/doi/pdf/10.1080/03772063.2023.2196965

Reference27 articles.

1. Low-Power and Area-Efficient Carry Select Adder

2. N. Gaur, A. Mehra, P. Kumar, and S. Kallakuri. “16 Bit Power Efficient Carry Select Adder,” in 2019 6th International Conference on Signal Processing and Integrated Networks (SPIN), pp. 558–61, Mar. 2019.

3. N. Singla, and J. Kaur. “Analysis of different types of adders: A review,” in International Conference on Advanced Material Technologies (ICAMT), 27-28,Visakhapatnam, India, pp. 1–7, Dec. 2016.

4. Carry-Select Adder

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Advantages of Bistable Microwires in Digital Signal Processing;Sensors;2024-04-10

2. A new nano-design of 16-bit carry look-ahead adder based on quantum technology;Physica Scripta;2023-11-09

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