A complete and Verilog-A compatible Gate-All-Around long-channel junctionless MOSFET model implemented in CMOS inverters
Author:
Publisher
Elsevier BV
Subject
General Engineering
Reference13 articles.
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Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Analytical Compact Model of Nanowire Junctionless Gate-All-Around MOSFET Implemented in Verilog-A for Circuit Simulation;Silicon;2022-03-29
2. Device Architectures to Mitigate Challenges in Junctionless Field-Effect Transistors;Junctionless Field-Effect Transistors;2019-02-08
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