A 0.8–3.2 GHz PLL with wide frequency division ratio range

Author:

Wu Jin,Li Jinwen,Wu Xudong,Wan ChenggongORCID,Zheng Lixia,Sun Weifeng

Funder

National Natural Science Foundation of China

Natural Science Foundation of Jiangsu Province

Publisher

Elsevier BV

Subject

General Engineering

Reference16 articles.

1. A 0.9–2.25-GHz sub-0.2-mW/GHz compact low-voltage low-power hybrid digital PLL with loop bandwidth-tracking technique;Zhang;IEEE Trans. Very Large Scale Integr. Syst.,2018

2. A 0.4-1.7GHz wide range fractional-N PLL using a transition-detection DAC for jitter reduction;Yun,2020

3. A ku-band fractional-N frequency synthesizer with adaptive loop bandwidth control;Zhang;Electronics,2021

4. A 3.36-GHz locking-tuned type-I sampling PLL with −78.6-dBc reference spur merging single-path reference-feedthrough-suppression and narrow-pulse-shielding techniques;Huang;IEEE Transactions on Circuits and Systems II: Express Briefs,2021

5. Chao Yang, Xiaoming Liu, Jing Jin, Jianjun Zhou, A 0.023–12GHz ultra-wideband frequency synthesizer with FOMT of −251.8dB, Microelectron. J., Volume 120, 2022.

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Power-efficient wideband programmable pseudo differential ring oscillator CP-PLL;Microelectronics Journal;2024-09

2. Comparative Analysis of Phase/Frequency Detector in a Complete PLL System;2023 International Conference on Distributed Computing and Electrical Circuits and Electronics (ICDCECE);2023-04-29

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