Author:
Zong Yong,Gao Jing,Yin Zhaoyang,Shen Shilin,Nie Kaiming,Liu Wen,Xu Jiangtao
Funder
National Natural Science Foundation of China
Reference20 articles.
1. Analog-to-digital conversion architectures for intelligent optical sensor arrays;Torelli;Adv. Imaging Netw. Technol.,1996
2. A digitally-calibrated 2-stage cyclic ADC for a 33-Mpixel 120-fps super high-vision CMOS image sensor;Watabe;IEEE Sens. Conf.,2014
3. 22 μm-pitch 9-bit Column-Parallel Overlapping-Subrange SAR (CPOSSAR) ADC;Wang;Microelectron. J.,2015
4. A low-noise high-dynamic-range 17-b 1.3-megapixel 30-fps CMOS image sensor with column-parallel two-stage folding-integration/Cyclic ADC;Seo;IEEE Trans. Electron Devices,2012
5. A high-speed low-noise CMOS image sensor with 13-b column-parallel single-ended cyclic ADCs;Park;IEEE Trans. Electron Devices,2009
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