Author:
Nam Jae-Won,Jeon Young-Deuk,Cho Young-Kyun,Kwon Jong-Kee
Reference13 articles.
1. A 1.2V 12b 60MS/s CMOS analog front-end for image signal processing applications;Jeon;ETRI Journal,2009
2. A 12-bit 200-MHz CMOS ADC;Sahoo;IEEE Journal of Solid State Circuits,2009
3. K.-W. Hsueh, Y.-K. Chou, Y.-H. Tu, et al., A 1V 11b 200MS/s pipelined ADC with digital background calibration in 65nm CMOS, in: Proceedings of the IEEE International Solid-State Circuits Conference, Digest of Technical Papers, 2008, pp. 546–547.
4. A 1.2-V 12-b 120-MS/s SHA-free dual-channel Nyquist ADC based on midcode calibration;Choi;IEEE Transactions on Circuits and Systems I: Regular Papers,2009
5. A 14-bit 125MS/s IF/RF sampling pipelined ADC with 100-dB SFDR and 50fs jitter;Ali;IEEE Journal of Solid State Circuits,2006
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