Compaction-based concurrent error detection for digital circuits-Reference-Cited by-同舟云学术

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Compaction-based concurrent error detection for digital circuits

Published:2005-09 Issue:9 Volume:36 Page:856-862
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Almukhaizim Sobeeh,Drineas Petros,Makris Yiorgos

Publisher

Elsevier BV

Subject

General Engineering

Reference21 articles.

1. Error Detection Circuits;Gossel,1993

2. Which concurrent error detection scheme to choose;Mitra,2000

3. Design of self-checking built-in check circuits for automata with memory;Aksenova;Automation and Remote Control,1975

4. Design of self-checking sequential machines;Dhawan;IEEE Transactions on Computers,1988

5. Design and synthesis of self-checking VLSI circuits;Jha;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,1993

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. On-Line Testing of digital VLSI circuits at Register Transfer Level using High Level Decision Diagrams;Microelectronics Journal;2017-09

2. A Binary Decision Diagram based on-line testing of digital VLSI circuits for feedback bridging faults;Microelectronics Journal;2015-07

3. Improving circuit performance with multispeculative additive trees in high-level synthesis;Microelectronics Journal;2014-11

4. Circuit Level Concurrent Error Detection in FSMs;Journal of Electronic Testing;2013-04

5. Concurrent checking with split-parity codes;2009 15th IEEE International On-Line Testing Symposium;2009-06

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