PFD with improved average gain and minimal blind zone combined with lock-in detection for fast settling PLLs

Author:

H.K. RaviORCID,Mukherjee JayantaORCID

Publisher

Elsevier BV

Subject

General Engineering

Reference16 articles.

1. H.K. Ravi, Shashank Tiwari, Jayanta Mukherjee, A new archiectecture of the phase frequency detector with improved gain and minimal blind zone for fast settling, PLLs, in: IEEE International Symposium on Circuits and Systems (ISCAS), 2020.

2. M. Mansuri, D. Liu, C.-.K. Yang, Fast frequency acquisition phase-frequency detectors for GSa/s phase-locked loops, in: Proceedings of the 27th European Solid-State Circuits Conference, 2001, pp. 333-336.

3. Modeling the high-frequency degradation of phase/frequency detectors;Chen;IEEE Trans. Circuit. Syst. II,2010

4. A 6.3-9-GHz CMOS fast settling PLL for MB-OFDM UWB applications;Tak;IEEE J. Solid-State Circuit.,2005

5. Phase frequency detector with minimal blind zone for fast frequency acquisition;Chen;IEEE Trans. Circuit. Syst. II,2010

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