1. “The Design of Rijndael: AES – the Advanced Encryption Standard”;Daemen,2002
2. Area, delay, and power characteristics of standard-cell implementations of the AES S-box;Tillich;Journal of Signal Processing Systems,2008
3. A compact rijndael hardware architecture with S-box optimization;Satoh,2001
4. Architecture and VLSI implementations of the AES proposal Rijndael;Sklavos;IEEE Trans. Comput.,2002
5. An efficient multi-mode multiplier supporting AES and fundamental operations of public-key cryptosystems;Wang;IEEE Trans. On VLSI Systems,2010