A comprehensive analysis of the effect of finite amplifier bandwidth and excess loop delay in continuous-time sigma–delta modulators

Author:

Quintanilla L.,Arias J.,Segundo J.,Enriquez L.,Hernandez-Mangas J.M.,Vicente J.

Publisher

Elsevier BV

Subject

General Engineering

Reference27 articles.

1. K. Philips, P.A.C.M. Nuijten, R. Roovers, F. Muñoz, M. Tejero, A. Torralba, A 2mW 89dB continuous-time ΣΔ ADC with increased immunity to wide-band interferers, in: Proceedings of IEEE International Solid-State Circuits Conference (ISSCC 2004), 2004.

2. A 32-mW, 320-MHz, continuous-time, complex delta–sigma ADC for multi-mode wireless-LAN receivers;Arias;IEEE Journal of Solid-State Circuits,2006

3. A 14bit continuous-time delta–sigma A/D modulator with 2.5MHz signal bandwidth;Li;IEEE Journal of Solid-State Circuits,2007

4. On the design of high-performance wide-band continuous-time sigma–delta converters using numerical optimization;Loeda;IEEE Transactions on Circuits and Systems I: Regular Papers,2006

5. An IF-to-baseband sigma–delta modulator for AM/FM/IBOC radio receivers with a 118dB dynamic range;Silva;IEEE Journal of Solid-State Circuits,2007

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