An ultra-low power multiplier using multi-valued adiabatic logic in 65 nm CMOS process-Reference-Cited by-同舟云学术

An ultra-low power multiplier using multi-valued adiabatic logic in 65 nm CMOS process

Published:2018-08 Issue: Volume:78 Page:26-34
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Yuejun Zhang,Dailu Ding,Zhao Pan,Pengjun Wang,Qiaoyan Yu

Funder

National Natural Science Foundation of China

Zhejiang Provincial Natural Science Foundation of China

S&T Plan of Zhejiang Provincial Science and Technology Department

Ningbo Natural Science Foundation

Publisher

Elsevier BV

Subject

General Engineering

Reference20 articles.

1. An efficient charge recovery logic circuit;Moon;IEEE J. Solid State Circ.,1996

2. Synthesis of dual-rail adiabatic logic for low power security applications, IEEE Trans. CAD Integr;Morrison;Circ. Syst.,2014

3. DPA-secured quasi-adiabatic logic (SQAL) for low-power passive RFID tags employing s-boxes;Avital;IEEE Trans. Circ. Syst. I: Regul. Pap.,2015

4. One-dimensional adiabatic circuits with inherent charge recycling;Khorami;Electron. Lett.,2015

5. Very-large-scale integration implementation of a 16-bit clocked adiabatic logic logarithmic signal processor;Yemiscioglu;IET Comput. Digital Tech.,2015

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Performance Analysis of Ternary Full Adder designs using proposed Ternary 3:1 MUX;2023 Second International Conference on Trends in Electrical, Electronics, and Computer Engineering (TEECCON);2023-08-23

2. Investigation of Adiabatic Logic in Nano-meter Technology;International Journal of Electronics;2023-07-27

3. A low power design using FinFET based adiabatic switching principle: Application to 16-Bit arithmetic logic unit;Ain Shams Engineering Journal;2023-04

4. Study of Adiabatic Logic-Based Combinational and Sequential Circuits for Low-Power Applications;Low Power Architectures for IoT Applications;2023

5. Energy-Efficient circuits with improved diode free adiabatic logic design methodology;Ain Shams Engineering Journal;2022-11