Surface passivation of III–V semiconductors for future CMOS devices—Past research, present status and key issues for future-Reference-Cited by-同舟云学术

Surface passivation of III–V semiconductors for future CMOS devices—Past research, present status and key issues for future

Published:2010-07 Issue:19 Volume:256 Page:5698-5707
ISSN:0169-4332
Container-title:Applied Surface Science
language:en
Short-container-title:Applied Surface Science

Author:

Hasegawa H.,Akazawa M.,Domanowska A.,Adamowicz B.

Publisher

Elsevier BV

Subject

Surfaces, Coatings and Films,Condensed Matter Physics,Surfaces and Interfaces,General Physics and Astronomy,General Chemistry

Reference65 articles.

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2. Benchmarking Nanotechnology for High-Performance and Low-Power Logic Transistor Applications

3. See Int. Technol. Roadmap for Semiconductors 2007 Edition for “Process Integration, Devices and Structures” at http://www.itrs.net/Links/2007ITRS/Home2007.htm.

4. See Int. Technol. Roadmap for Semiconductors 2007 Edition for “Emerging Research Devices” at http://www.itrs.net/Links/2007ITRS/Home2007.htm.

5. Schottky barrier gate field effect transistor

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