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Design and evaluation of ZMesh topology for on-chip interconnection networks

  • Published:2018-03 Issue: Volume:113 Page:17-36
  • ISSN:0743-7315
  • Container-title:Journal of Parallel and Distributed Computing
  • language:en
  • Short-container-title:Journal of Parallel and Distributed Computing

Author:

Prasad N.ORCID,Mukherjee Priyajit,Chattopadhyay Santanu,Chakrabarti Indrajit

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Theoretical Computer Science,Software

Reference34 articles.

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2. Networks on chips: a new SoC paradigm;Benini;Computer,2002

3. Benchmarking Modern Multiprocessors;Bienia,2011

4. An evaluation of high-level mechanistic core models;Carlson;ACM Trans. Archit. Code Optim.,2014

5. Wirability of knock-knee layouts with 45∘ wires;Chiang;IEEE Trans. Circuits Syst.,1991

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1. Routing and Wavelength Assignment for Multiple Multicasts in Optical Network-on-Chip (ONoC);IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-12

2. Evaluation of 3D-DiamondMesh Homogeneous and Heterogeneous Architectures;TENCON 2023 - 2023 IEEE Region 10 Conference (TENCON);2023-10-31

3. A two-level network-on-chip architecture with multicast support;Journal of Parallel and Distributed Computing;2023-02

4. The CTH Network: An NoC Platform for Scalable and Energy Efficient Application Mapping Solution;IEEE Transactions on Nanotechnology;2023

5. Design and evaluation of an energy efficient DiamondMesh topology for on-chip interconnection networks;Design Automation for Embedded Systems;2022-12
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