An automatic ABV methodology enabling PSL assertions across SLD flow for SOCs modeled in SystemC-Reference-Cited by-同舟云学术

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An automatic ABV methodology enabling PSL assertions across SLD flow for SOCs modeled in SystemC

Published:2005-06 Issue:4-5 Volume:31 Page:282-302
ISSN:0045-7906
Container-title:Computers & Electrical Engineering
language:en
Short-container-title:Computers & Electrical Engineering

Author:

Lahbib Younes,Kamdem Romain,Benalycherif Mohamed-lyes,Tourki Rached

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,General Computer Science,Control and Systems Engineering

Reference37 articles.

1. Ali H, Sofiene T. On the extension of SystemVerilog assertion. In: CCECE/CCGEI, IEEE, Niagara Falls, May 2004.

2. SystemC Homepage, 2004. Available from: .

3. Assertion-based design;Foster,2003

4. System design with SystemC;Thorsten,2003

5. Logic of constraints: a quantitative performance and functional constraint formalism;Chen;IEEE Trans Comput-Aid Des Integrated Circ Syst,2004

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. System‐level assertions: approach for electronic system‐level verification;IET Computers & Digital Techniques;2015-05

2. Reusing RTL Assertion Checkers for Verification of SystemC TLM Models;Journal of Electronic Testing;2015-03-20

3. Assertion-Based Functional Consistency Checking between TLM and RTL Models;2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems;2013-01

4. Automatic RTL Test Generation from SystemC TLM Specifications;ACM Transactions on Embedded Computing Systems;2012-07

5. System on Chips optimization using ABV and automatic generation of SystemC codes;Microprocessors and Microsystems;2007-11

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