Author:
Kalaiselvi K.,Mangalam H.
Publisher
Springer Science and Business Media LLC
Reference20 articles.
1. Advanced Encryption Standard;Aes,2001
2. Architecture design of high-efficient and non-memory AES crypto-core for WPAN;Chen;Concurr. Comput.: Pract. Exp.,2011
3. Comparison of the hardware performance of the AES candidates using reconfigurable hardware;Chodowiec,2002
4. The Design of Rijndael. Information Security and Cryptography. Text and Monographs;Daemen,2002
5. Addressing future space challenges using reconfigurable instruction cell based architectures;El-Rayis,2008
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