FLIP-chip and “backside” techniques-Reference-Cited by-同舟云学术

FLIP-chip and “backside” techniques

Published:1999-06 Issue:6-7 Volume:39 Page:721-730
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Barton D.L.,Bernhard-Höfer K.,Cole E.I.

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference42 articles.

1. 64Mb DRAM challenges;Lowrey;Semiconductor International,1993

2. Controlled collapse chip connection (C4) — an enabling technology;DeHaven;IEEE,1994

3. A high-density C4/CBGA interconnect technology for a CMOS microprocessor;Kromann,1994

4. Flip chip package failure mechanisms;Semmens;Solid State Technology,1998

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