SOI MOSFET with an insulator region (IR-SOI): A novel device for reliable nanoscale CMOS circuits
Author:
Publisher
Elsevier BV
Subject
Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science
Reference15 articles.
1. Experimental 0.25-μm-gate fully depleted CMOS/SIMOX process using a new two-step LOCOS isolation technique
2. A new symmetrical double gate nanoscale MOSFET with asymmetrical side gates for electrically induced source/drain
3. Double-gate CMOS: symmetrical- versus asymmetrical-gate devices
4. Asymmetric Schottky Tunneling Source SOI MOSFET Design for Mixed-Mode Applications
5. Effects of Substrate Orientation and Channel Stress on Short-Channel Thin SOI MOSFETs
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