An FPGA-based multiple-weight-and-neuron-fault tolerant digital multilayer perceptron-Reference-Cited by-同舟云学术

An FPGA-based multiple-weight-and-neuron-fault tolerant digital multilayer perceptron

Published:2013-01 Issue: Volume:99 Page:570-574
ISSN:0925-2312
Container-title:Neurocomputing
language:en
Short-container-title:Neurocomputing

Author:

Horita T.,Takanami I.

Publisher

Elsevier BV

Subject

Artificial Intelligence,Cognitive Neuroscience,Computer Science Applications

Reference6 articles.

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3. T. Horita, I. Takanami, A multiple-weight-and-neuron-fault tolerant multilayer digital neural network implementation, in: Proceedings of the International Conference on ICONIP'05, 2005, pp. 570–575.

4. High performance fault-tolerant digital neural networks;Bettola;IEEE Trans. Comput.,1998

5. Self reconfigurable multi-layer neural networks with genetic algorithms;Sugawara;IEICE Trans. Inf. Syst.,2004

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