A Multiple-Weight-and-Neuron-Fault Tolerant Digital Multilayer Neural Network
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/4030903/4030904/04030968.pdf?arnumber=4030968
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Appropriate Selection for Numbers of neurons and layers in a Neural Network Architecture: A Brief Analysis;Sir Syed University Research Journal of Engineering & Technology;2024-01-01
2. Understanding fault-tolerance vulnerabilities in advanced SoC FPGAs for critical applications;Microelectronics Reliability;2023-07
3. Hardware Tripartite Synapse Architecture based on Stochastic Computing;2019
4. Researcing the Fault Tolerance of Robotic System Designed via Use of Neural Network Decision Making Component of Image Processing;2018 Engineering and Telecommunication (EnT-MIPT);2018-11
5. An FPGA-based multiple-weight-and-neuron-fault tolerant digital multilayer perceptron;Neurocomputing;2013-01
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