The Future is Frozen: Cryogenic CMOS for High-Performance Computing (Invited)
Author:
Funder
Defense Advanced Research Projects Agency Microsystems Technology Office
Defense Advanced Research Projects Agency
Publisher
Elsevier BV
Reference24 articles.
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3. H. L. Chiang et al., "Cold CMOS as a Power-Performance-Reliability Booster for Advanced FinFETs," 2020 IEEE Symposium on VLSI Technology, Honolulu, HI, USA, 2020, pp. 1-2, doi: 10.1109/VLSITechnology18217.2020.9265065.
4. R. Saligram, D. Prasad, D. Pietromonaco, A. Raychowdhury and B. Cline, "A 64-Bit Arm CPU at Cryogenic temperatures: Design Technology Co-Optimization for Power and Performance," 2021 IEEE Custom Integrated Circuits Conference (CICC), Austin, TX, USA, 2021, pp. 1-2, doi: 10.1109/CICC51472.2021.9431559.
5. Power Performance Analysis of Digital Standard Cells for 28 nm Bulk CMOS at Cryogenic Temperature Using BSIM Models;Saligram;IEEE Journal on Exploratory Solid-State Computational Devices and Circuits,2021
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