Fixed-outline floorplanning using robust evolutionary search

Author:

Chen De-Sheng,Lin Chang-Tzu,Wang Yi-Wen,Cheng Ching-Hwa

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Artificial Intelligence,Control and Systems Engineering

Reference18 articles.

1. Fixed-outline floorplanning: enabling hierarchical design;Adya;IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2003

2. Alpert, C.J., Hagen, L.W., Kahng, A.B., 1996. A hybrid multilevel/genetic approach for circuit partitioning. In: Fifth ACM/SIGDA Physical Design Workshop, pp. 100–105.

3. Chang, Y.-C., Chang, Y.-W., Wu, G.-M., Wu, S.-W., 2000. B*-trees: a new representation for non-slicing floorplans. In: Proceedings of the DAC, pp 458–463.

4. Feng, Y., Mehta, D.P., Yang, H., 2003. Constrainted modern floorplanning. In: Proceedings of the ISPD, pp. 128–135.

5. Ho, S.-Y., Chang, X.-I., 1999. An efficient generalized multiobjective evolutionary algorithm. In: Proceedings of the Genetic and Evolutionary Computation Conference, pp. 871–878.

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2. Plant Layout Optimization Using Evolutionary Algorithms;Lecture Notes in Computer Science;2019

3. VLSI Floorplanning Using Entropy Based Intelligent Genetic Algorithm;Communications in Computer and Information Science;2018

4. Cost reduction in bottom-up hierarchical-based VLSI floorplanning designs;International Journal of Circuit Theory and Applications;2013-07-19

5. Variable-Order Ant System for VLSI multiobjective floorplanning;Applied Soft Computing;2013-07

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