1. Networks on Chip,2003
2. Networks on chips: a new SoC paradigm;Benini;Computer,2002
3. D.M. Chapiro, Globally-Asynchronous Locally-Synchronous Systems, PhD thesis, Stanford University, October 1984.
4. J. Muttersbach, T. Villiger, W. Fichtner, Practical design of globally-asynchronous locally-synchronous systems, in: Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems, 200, pp. 52–59.
5. D.E. Lackey, P.S. Zuchowski, Thomas R. Bednar, D.W. Stout, S.W. Gould, J.M. Cohn, Managing power and performance for system-on-chip designs using voltage islands, in: Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002, pp. 195–202.