Managing power and performance for System-on-Chip designs using Voltage Islands

Author:

Lackey David E.,Zuchowski Paul S.,Bednar Thomas R.,Stout Douglas W.,Gould Scott W.,Cohn John M.

Publisher

ACM Press

Cited by 35 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Simplified introduction of power intent into a register-transfer level model;Design Automation for Embedded Systems;2021-08-15

2. Energy-efficient scheduling of streaming applications in VFI-NoC-HMPSoC based edge devices;Journal of Ambient Intelligence and Humanized Computing;2020-12-14

3. Machine learning for design space exploration and optimization of manycore systems;Proceedings of the International Conference on Computer-Aided Design;2018-11-05

4. Runtime adjustment of IoT system-on-chips for minimum energy operation;Proceedings of the 55th Annual Design Automation Conference;2018-06-24

5. IPRM: IP core resource multiplexing of core wrapper design for reducing test application time in DVFS-based multicore SoCs;Integration;2017-03

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