Simplified introduction of power intent into a register-transfer level model
Author:
Funder
Ministerstvo školstva, vedy, výskumu a športu Slovenskej republiky
ESET Research Centre
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Software
Link
https://link.springer.com/content/pdf/10.1007/s10617-021-09254-w.pdf
Reference26 articles.
1. Vassighi A, Sachdev M (2006) Thermal runaway in integrated circuits. IEEE Trans Device Mater Reliab 6(2):300–305. https://doi.org/10.1109/TDMR.2006.876577
2. IEEE (2019) IEEE standard for design and verification of low-power, energy-aware electronic systems. IEEE Std 1801–2018:1–548. https://doi.org/10.1109/IEEESTD.2019.8686430
3. Silicon Integration Initiative (2014) Si2 Common Power Format. Si2
4. Panda PR (2010) Power-efficient system design. Springer, New York
5. Lackey DE, Zuchowski PS, Bednar TR, Stout DW, Gould SW, Cohn JM (2002) Managing power and performance for system-on-chip designs using voltage islands. In: Proceedings of the 2002 IEEE/ACM international conference on computer-aided design, ACM, New York, NY, USA, ICCAD ’02, pp 195–202. https://doi.org/10.1145/774572.774601
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