Low power noise immune node voltage comparison keeper design for high speed architectures
Author:
Publisher
Elsevier BV
Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference17 articles.
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3. Understanding the Effect of process variations on the delay of static and Domino logic;Alioto;IEEE Trans. Very Large Scale Integr. Syst.,2010
4. A new leakage-tolerant domino circuit using voltage-comparison for wide fan-in gates in deep sub-micron technology;Asyaei;INTEGRATION VLSI J.,2015
5. Domino noise model: a new crosstalk noise model for dynamic logic circuits;Choi,2003
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