A buffer placement algorithm to overcome short-circuit power dissipation in mesh based clock distribution network-Reference-Cited by-同舟云学术

A buffer placement algorithm to overcome short-circuit power dissipation in mesh based clock distribution network

Published:2015-06 Issue:2 Volume:18 Page:135-140
ISSN:2215-0986
Container-title:Engineering Science and Technology, an International Journal
language:en
Short-container-title:Engineering Science and Technology, an International Journal

Author:

Reuben John^ORCID,Zackriya V. Mohammed,Kittur Harish M.,Shoaib Mohd^ORCID

Publisher

Elsevier BV

Subject

Metals and Alloys,Computer Networks and Communications,Fluid Flow and Transfer Processes,Hardware and Architecture,Mechanical Engineering,Biomaterials,Civil and Structural Engineering,Electronic, Optical and Magnetic Materials

Reference12 articles.

1. Meshworks: a comprehensive framework for optimized clock mesh network synthesis;Rajaram;IEEE Trans. Comput. Aided Design Integr. Circuits Syst.,2010

2. High-performance clock mesh optimization;Guthaus;ACM Trans. Des. Autom. Electron. Syst.,2012

3. Capacitance driven clock mesh synthesis to minimize skew and power dissipation;Reuben;IEICE Electron. Express,2013

4. ISPD 2010 high performance clock network synthesis contest: benchmark suite and results;Sze,2010

5. Digital Integrated Circuits, a Design Perspective;Rabaey,2003

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