A novel 700V deep trench isolated double RESURF LDMOS with P-sink layer
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/7981281/7988866/07988954.pdf?arnumber=7988954
Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Novel Bulk Homogenization Field Devices With Reducing Process Difficulty;IEEE Electron Device Letters;2024-07
2. Specific On-Resistance Reduction for the LDMOS Using Separated Composite Dielectric Trenches;IEEE Transactions on Electron Devices;2024-01
3. An Isolation Structure Applying Potential Control Technique for 1200 V HVICs;IEEE Transactions on Electron Devices;2024-01
4. Performance and Reliability Co-design of Ultra High Voltage LDMOS Devices;2022 IEEE International Conference on Emerging Electronics (ICEE);2022-12-11
5. BCD Process Technologies;Springer Handbook of Semiconductor Devices;2022-11-11
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