Experimental and numerical demonstration and optimized methods for SiC trench MOSFET short-circuit capability-Reference-Cited by-同舟云学术

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Experimental and numerical demonstration and optimized methods for SiC trench MOSFET short-circuit capability

Published:2017-05 Issue: Volume: Page:
ISSN:
Container-title:2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)
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Author:

Namai Masaki,An Junjie,Yano Hiroshi,Iwamuro Noriyuki

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7981281/7988866/07988993.pdf?arnumber=7988993

Cited by 32 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A novel SiC VD-MOSFET with optimized P-type shielding structure in JFET region for improved short circuit robustness;Engineering Research Express;2024-08-22

2. High-Energy Dynamic Avalanche to Failure by Incremental Source-Voltage Increase in Symmetric Double-Trench & Asymmetric Trench SiC MOSFETs;IEEE Open Journal of Industry Applications;2024

3. Review on the Reliability Mechanisms of SiC Power MOSFETs: A Comparison Between Planar-Gate and Trench-Gate Structures;IEEE Transactions on Power Electronics;2023-07

4. Investigations of Residual Damage in SiC Trench MOSFETs after Single and Multiple Short-Circuit Stress;2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD);2023-05-28

5. Investigation of a 4H-SiC Trench MOSFET with Back-Side Super Junction;Micromachines;2022-10-18

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