A 13.7 TFLOPS/W Floating-point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory-Reference-Cited by-同舟云学术

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A 13.7 TFLOPS/W Floating-point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory

Published:2021-06-13 Issue: Volume: Page:
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Container-title:2021 Symposium on VLSI Circuits
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Author:

Lee Juhyoung,Kim Jihoon,Jo Wooyoung,Kim Sangyeob,Kim Sangjin,Lee Jinsu,Yoo Hoi-Jun

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9492225/9492226/09492476.pdf?arnumber=9492476

Cited by 28 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 28-nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs;IEEE Journal of Solid-State Circuits;2024-09

2. SP-PIM: A Super-Pipelined Processing-In-Memory Accelerator With Local Error Prediction for Area/Energy-Efficient On-Device Learning;IEEE Journal of Solid-State Circuits;2024-08

3. A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture;IEEE Journal of Solid-State Circuits;2024-08

4. Toggle Rate Aware Quantization Model Based on Digital Floating-Point Computing-In-Memory Architecture;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-06

5. AFT-CIM: An Energy Efficient ADC-Free Transpose Computing-in-Memory Macro for MAC Operations;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

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