Author:
Kra Yehuda,Noy Tzachi,Teman Adam
Cited by
2 articles.
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1. VirtualSync+: Timing Optimization With Virtual Synchronization;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-12
2. A RISC-V-based Research Platform for Rapid Design Cycle;2022 IEEE International Symposium on Circuits and Systems (ISCAS);2022-05-28