Impact of Backside Defects on Device Characteristics of Ultra-Thin DRAMs with 3-5 μm Si Wafers for Bumpless Build Cube (BBCube) Application-Reference-Cited by-同舟云学术

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Impact of Backside Defects on Device Characteristics of Ultra-Thin DRAMs with 3-5 μm Si Wafers for Bumpless Build Cube (BBCube) Application

Published:2022-05-11 Issue: Volume: Page:
ISSN:
Container-title:2022 International Conference on Electronics Packaging (ICEP)
language:
Short-container-title:

Author:

Chen Z.¹,Araki N.¹,Kim Y.¹,Fukuda T.¹,Sakui K.¹,Nakamura T.¹,Kobayashi T.²,Obara T.²,Ohba T.¹

Affiliation:

1. Tokyo Institute of Technology,WOW Alliance,Yokohama,Japan

2. Micron Memory Japan,Sagamihara,Japan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9795348/9795361/09795532.pdf?arnumber=9795532

Reference8 articles.

1. Vertically Replaceable Memory Block Architecture for Stacked DRAM Systems by Wafer-on-Wafer (WOW) Technology

2. Review of Bumpless Build Cube (BBCube) Using Wafer-on-Wafer (WOW) and Chip-on-Wafer (COW) for Tera-Scale Three-Dimensional Integration (3DI)

3. Reliability of Wafer-Level Ultra-Thinning down to 3 µm using 20 nm-Node DRAMs

4. Behavior of copper contamination on backside damage for ultra-thin silicon three dimensional stacking structure

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