A Photolithography Process Design for 5 nm Logic Process Flow
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Journal of Microelectronic Manufacturing
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Light–Material Interactions Using Laser and Flash Sources for Energy Conversion and Storage Applications;Nano-Micro Letters;2024-08-26
2. In-Situ Orthogonal TEM Lamella Conversion for Catching Subtle Defects in 3D Transistors of Microprocessor Devices;Microscopy and Microanalysis;2023-07-22
3. Process Window, and Process Optimization in Both Low and High Na EUV Processes for Advanced Logic Technologies Nodes;2022 China Semiconductor Technology International Conference (CSTIC);2022-06-20
4. A Study of the Advantages to the Photolithography Process brought by the High NA EUV Exposure Tool in Advanced Logic Design Rules;2021 International Workshop on Advanced Patterning Solutions (IWAPS);2021-12-12
5. The Discussion of the Typical BEOL Design Rules from 3 nm to 2 nm Logic Process with EUV and High NA EUV Lithography;2021 International Workshop on Advanced Patterning Solutions (IWAPS);2021-12-12
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