Coarse-Grained Reconfigurable Array: Architecture and Application Mapping-Reference-Cited by-同舟云学术

Coarse-Grained Reconfigurable Array: Architecture and Application Mapping

Published:2011 Issue: Volume:4 Page:31-46
ISSN:1882-6687
Container-title:IPSJ Transactions on System LSI Design Methodology
language:en
Short-container-title:IPSJ Transactions on System LSI Design Methodology

Author:

Choi Kiyoung

Publisher

Information Processing Society of Japan

Subject

Electrical and Electronic Engineering,Computer Science Applications

Link

http://www.jstage.jst.go.jp/article/ipsjtsldm/4/0/4_0_31/_pdf

Reference47 articles.

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4. 4) Hartenstein R.W. and Kress, R.: A Datapath Synthesis System for the Reconfigurable Datapath Architecture, ASP-DAC, pp.479-484 (1995).

5. 5) Hartenstein, R., Herz, M., Hoffmann, T. and Nageldinger, U.: On Reconfigurable Co-Processing Units, Reconfigurable Architectures Workshop (1998).

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