Circuit Techniques for Device-Circuit Interaction toward Minimum Energy Operation
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Published:2019
Issue:0
Volume:12
Page:2-12
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ISSN:1882-6687
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Container-title:IPSJ Transactions on System LSI Design Methodology
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language:en
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Short-container-title:IPSJ Transactions on System LSI Design Methodology
Author:
Islam A.K.M. Mahfuzul1, Onodera Hidetoshi2
Affiliation:
1. Department of Electrical Engineering, Graduate School of Engineering, Kyoto University 2. Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
Publisher
Information Processing Society of Japan
Subject
Electrical and Electronic Engineering,Computer Science Applications
Reference42 articles.
1. [1] Howard, J., Dighe, S., Hoskote, Y., Vangal, S., Finan, D., Ruhl, G., Jenkins, D., Wilson, H., Borkar, N., Schrom, G., Pailet, F., Jain, S., Jacob, T., Yada, S., Marella, S., Salihundam, P., Erraguntla, V., Konow, M., Riepen, M., Droege, G., Lindemann, J., Gries, M., Apel, T., Henriss, K., Tor, L., Steibl, S., Borkar, S., De, V., Wijngaart, R. and Mattson, T.: A 48-Core IA-32Message-Passing Processor with DVFS in 45nm CMOS, IEEE International Solid-State Circuits Conference, pp.108-109 (2010). 2. [2] Tschanz, J.W., Narendra, S., Nair, R. and De, V.: Effectiveness of Adaptive Supply Voltage and Body Bias for Reducing Impact of Parameter Variations in Low Power and High Performance Microprocessors, IEEE Journal of Solid-State Circuits, Vol.38, No.5, pp.826-829 (2003). 3. [3] Sakata, T., Itoh, K., Horiguchi, M. and Aoki, M.: Subthreshold-current Reduction Circuits for Multi-gigabit DRAM's, IEEE Journal of Solid-State Circuits, Vol.29, No.7, pp.761-769 (1994). 4. [4] Hashimoto, T., Ohashi, M., Matsuo, M., Kuromaru, S., Mori-iwa, T., Hamada, M., Sugisawa, Y., Tomita, H., Hoshino, M., Nakamura, T., ichi Ishida, K., Watada, K., Fukunaga, T. and Michiyama, J.: A 27-MHz/54-MHz 11-mW MPEG-4 Video Decoder LSI for Mobile Applications, IEEE Journal of Solid-State Circuits, Vol.37, No.11, pp.1574-1581 (2002). 5. [5] Kuroda, T.: Optimization and Control of VDD and VTH for Low-Power, High-Speed CMOS Design, IEEE/ACM International Conference on Computer Aided Design, pp.28-34 (2002).
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