Carbon nanotube memory cell array program error analysis and tradeoff between reset voltage and verify pulses-Reference-Cited by-同舟云学术

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Carbon nanotube memory cell array program error analysis and tradeoff between reset voltage and verify pulses

Published:2016-02-24 Issue:4S Volume:55 Page:04EE01
ISSN:0021-4922
Container-title:Japanese Journal of Applied Physics
language:
Short-container-title:Jpn. J. Appl. Phys.

Author:

Ning Sheyang,Iwasaki Tomoko Ogura,Hachiya Shogo,Rosendale Glen,Manning Monte,Viviani Darlene,Rueckes Thomas,Takeuchi Ken

Publisher

IOP Publishing

Subject

General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering

Link

http://stacks.iop.org/1347-4065/55/i=4S/a=04EE01/pdf

Reference25 articles.

1. Physical mechanisms of endurance degradation in TMO-RRAM

2. Demonstration of high-density ReRAM ensuring 10-year retention at 85°C based on a newly developed reliability model

3. Atomic-level engineering of phase change material for novel fast-switching and high-endurance PCM for storage class memory application

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Demonstration and Understanding of Nano-RAM Novel One-Time Programmable Memory Application;IEEE Transactions on Electron Devices;2019-05

2. Advanced Bit Flip Concatenates BCH Code Demonstrates 0.93% Correctable BER and Faster Decoding on (36 864, 32 768) Emerging Memories;IEEE Transactions on Circuits and Systems I: Regular Papers;2018-12

3. Graphene and Related Materials for Resistive Random Access Memories;Advanced Electronic Materials;2017-05-31

4. Reset-Check-Reverse-Flag Scheme on NRAM With 50% Bit Error Rate or 35% Parity Overhead and 16% Decoding Latency Reductions for Read-Intensive Storage Class Memory;IEEE Journal of Solid-State Circuits;2016-08

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