Numerical investigation and comparison with experimental characterisation of side gate p-type junctionless silicon transistor in pinch-off state-Reference-Cited by-同舟云学术

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Numerical investigation and comparison with experimental characterisation of side gate p-type junctionless silicon transistor in pinch-off state

Published:2012-09-01 Issue:9 Volume:7 Page:981-985
ISSN:1750-0443
Container-title:Micro & Nano Letters
language:en
Short-container-title:

Author:

Dehzangi A.,Hutagalung S.D.,Saion E.B.,Larki F.,Majlis B.Y.,Kharazmi A.,Kakooei S.,Abdullah A.M.,Hamidon M.N.,Navaseri M.

Publisher

Institution of Engineering and Technology (IET)

Subject

Condensed Matter Physics,General Materials Science,Biomedical Engineering,Bioengineering

Link

https://digital-library.theiet.org/content/journals/10.1049/mnl.2012.0590?crawler=true&mimetype=application/pdf

Reference21 articles.

1. Nanowire transistors without junctions

2. Fabrication of nanometer‐scale side‐gated silicon field effect transistors with an atomic force microscope

3. Field effect and Coulomb blockade in silicon on insulator nanostructures fabricated by atomic force microscope

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Analysis of D.C Parameters of Short-Channel Heterostructure Double Gate Junction-Less MOSFET Circuits Considering Quantum Mechanical Effects;Silicon;2020-06-08

2. Analog/RF Study of Self-aligned In0.53Ga0.47As MOSFET with Scaled Gate Length;Journal of Electronic Materials;2016-10-03

3. Study of the side gate junctionless transistor in accumulation region;Microelectronics International;2016-05-03

4. A two-dimensional analytical model for short channel junctionless double-gate MOSFETs;AIP Advances;2015-05

5. Effect of Geometric Parameters on the Performance of P-Type Junctionless Lateral Gate Transistors;PLoS ONE;2014-04-17

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