266–2133 MHz phase shifter using all‐digital delay‐locked loop and triangular‐modulated phase interpolator for LPDDR4X interface

Author:

Chae J.‐H.1,Kim M.1,Ko H.1,Jeong Y.1,Park J.1,Hong G.‐M.2,Jeong D.‐K.1,Kim S.1

Affiliation:

1. Department of Electrical and Computer EngineeringSeoul National UniversitySeoulRepublic of Korea

2. SK HynixIcheonGyeonggi‐doRepublic of Korea

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Design of a delay locked loop with low power and high operating frequency range characteristics in 180-nm CMOS process;Analog Integrated Circuits and Signal Processing;2023-12-19

2. Orthogonal phase mixing for improved linearity phase interpolator;Electronics Letters;2022-09-30

3. A 266-3750 MHz Wide-Range Adaptive Phase-Rotator-Based All Digital DLL for LPDDR5 Controllers;2022 IEEE International Symposium on Circuits and Systems (ISCAS);2022-05-28

4. Data-Dependent Selection of Amplitude and Phase Equalization in a Quarter-Rate Transmitter for Memory Interfaces;IEEE Transactions on Circuits and Systems I: Regular Papers;2020-09

5. Low-Power All-Digital Multiphase DLL Design Using a Scalable Phase-to-Digital Converter;IEEE Transactions on Circuits and Systems I: Regular Papers;2020-04

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